6.31.24 RISC-V Function Attributes

These function attributes are supported by the RISC-V back end:

naked

This attribute allows the compiler to construct the requisite function declaration, while allowing the body of the function to be assembly code. The specified function will not have prologue/epilogue sequences generated by the compiler. Only basic asm statements can safely be included in naked functions (see Basic Asm). While using extended asm or a mixture of basic asm and C code may appear to work, they cannot be depended upon to work reliably and are not supported.

interrupt

Use this attribute to indicate that the specified function is an interrupt handler. The compiler generates function entry and exit sequences suitable for use in an interrupt handler when this attribute is present.

You can specify the kind of interrupt to be handled by adding an optional parameter to the interrupt attribute like this:

void f (void) __attribute__ ((interrupt ("user")));

Permissible values for this parameter are user, supervisor, and machine. If there is no parameter, then it defaults to machine.

You can specify an SiFive CLIC preemptible interrupt handler by adding an optional parameter to the interrupt attribute like this:

void f (void) __attribute__ ((interrupt ("SiFive-CLIC-preemptible")));

In this type of interrupt handler, in the prologue, the mepc and mcause registers are saved, and interrupts are enabled. In the epilogue, interrupts are disabled, and the mepc and mcause registers are restored. This type of interrupt handler must be machine mode, and must not use the frame pointer.

You can specify an SiFive CLIC stack swapping interrupt handler by adding an optional parameter to the interrupt attribute like this:

void f (void) __attribute__ ((interrupt ("SiFive-CLIC-stack-swap")));

In this type of interrupt handler, the stack pointer will be swapped with the mscratch register in the prologue before the first use of the stack pointer, and in the epilogue after the last use of the stack pointer. This type of interrupt handler must be machine mode.